disp.h

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#ifndef DISP_CTRL_H__
#define DISP_CTRL_H__
#include <asw/asw_g_use.h>
#include <sdrv_common.h>
#include <types.h>
 
#define PLL_LVDS_MAX 1200000000 /* PLL_LVDS_MAX 1.2GHz*/
 
typedef enum { PIPE_TYPE_SPIPE, PIPE_TYPE_GPIPE, PIPE_TYPE_NUM } pipe_type_t;
 
typedef enum { MLC_LAYER_SP, MLC_LAYER_GP, MLC_LAYER_NUM } mlc_layer_index;
 
typedef enum {
    MLC_PATH_BG,
    MLC_PATH_SP,
    MLC_PATH_GP,
    MLC_PATH_NUM
} mlc_path_index;
 
enum { CLEAR_SPIPE_LAYER = 1, CLEAR_GPIPE_LAYER, CLEAR_ALL_LAYERS };
 
enum {
    IF_TYPE_INVALID = -1,
    IF_TYPE_NONE,
    IF_TYPE_LVDS,
    IF_TYPE_INTERNAL = IF_TYPE_LVDS,
};
 
enum { LVDS_MAP_FORMAT_NC = -1, LVDS_MAP_FORMAT_JEIDA, LVDS_MAP_FORMAT_SWPG };
 
enum { CSI_DC_1_1 = 0, CSI_DC_1_2, CSI_DC_1_3, CSI_DC_1_4 };
 
typedef enum { LCM_POLARITY_RISING = 0, LCM_POLARITY_FALLING = 1 } LCM_POLARITY;
 
enum { CRC32_MODE_INTERNAL = 0, CRC32_MODE_EXTERNAL = 1 };
 
enum {
    SDRV_DISPSS_STATUS_OK = SDRV_STATUS_OK,
    SDRV_DISPSS_STATUS_FAIL = SDRV_STATUS_FAIL,
    SDRV_DISPSS_STATUS_INVALID_PARAM =
        SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_DISPSS, 1),
    SDRV_DISPSS_STATUS_TIMEOUT = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_DISPSS, 2),
 
};
 
typedef struct {
    int x;
    int y;
    int w;
    int h;
} rect_t;
 
struct rle_info {
    int en;
    int data_size;
    int y_len;
    int y_checksum;
};
 
struct surface {
    int id;    
    int dirty; 
    int en; 
    int fmt;               
    rect_t src;            
    unsigned long addr[4]; 
    int src_stride[4];     
    rect_t start;
    rect_t dst;   
    int ckey_en;  
    int ckey;     
    int alpha_en; 
    char alpha;   
    int z_order;  
    int security;
 
    struct rle_info rle;
};
 
struct crc32block {
    unsigned int block_use;
    unsigned int cfg_start_x;
    unsigned int cfg_start_y;
    unsigned int cfg_end_x;
    unsigned int cfg_end_y;
    unsigned int expect_crc;
};
 
struct crc_info {
    int block_num;
    int mode; 
    struct crc32block *blocks;
};
 
struct post_cfg {
    char num_layers;        
    struct surface *layers; 
};
 
struct tcon_timing {
    unsigned int hact;
    unsigned int htol;
    unsigned int hsbp;
    unsigned int hsync;
 
    unsigned int vact;
    unsigned int vtol;
    unsigned int vsbp;
    unsigned int vsync;
};
 
struct display_timing {
    unsigned int tcon_clk;     
    unsigned int hactive;      
    unsigned int hfront_porch; 
    unsigned int hback_porch;  
    unsigned int hsync_len;    
    unsigned int vactive;      
    unsigned int vfront_porch; 
    unsigned int vback_porch;  
    unsigned int vsync_len;    
    unsigned int fps;          
    LCM_POLARITY dsp_clk_pol; 
    LCM_POLARITY de_pol;      
    LCM_POLARITY vsync_pol;   
    LCM_POLARITY hsync_pol;   
    unsigned int map_format;
};
 
struct dc_config {
    paddr_t base;
    int irq;
    struct crc_info *crc32;
};
 
struct dc_dev {
    paddr_t base;                    
    int irq;                         
    const struct dc_operations *ops; 
    struct sdrv_panel *panel;        
    int last_zorder[2];              
    struct asw_app_dc app;
    struct crc_info *crc32;       
    void (*vsync_callback)(void); 
};
 
struct dc_operations {
    int (*init)(struct dc_dev *dev);
    int (*reset)(struct dc_dev *dev);
    int (*update)(struct dc_dev *dev, struct post_cfg *post);
    int (*update_layer)(struct dc_dev *dev, struct surface *layer);
    void (*triggle)(struct dc_dev *dev);
    unsigned int (*check_triggle_status)(struct dc_dev *dev);
    void (*vsync_enable)(struct dc_dev *dev, bool enable);
    void (*enable)(struct dc_dev *dev);
    int (*irq_handler)(uint32_t irq, void *arg);
    void (*hsdk_enable)(struct dc_dev *dev, int mode, bool enable);
    int (*csi_mask_ratio_set)(struct dc_dev *dev, int mask_count, int ratio);
    int (*csi_timing_dectet_enable)(struct dc_dev *dev, bool enable);
    void (*set_tcon_after_detect)(struct dc_dev *dev, int ratio_num);
    void (*tcon_auto_adj_enable)(struct dc_dev *dev, bool enable);
    void (*tcon_csi_delay_set)(struct dc_dev *dev);
    void (*update_csi_detect)(struct dc_dev *dev, struct surface *surface,
                              int mask_count, int ratio, bool enable,
                              bool pll_mode);
    void (*set_bg_color)(struct dc_dev *dev, int color);
    void (*clear_layers)(struct dc_dev *dev, uint8_t id_mask, uint8_t z_order);
};
 
struct sdrv_panel {
    const char *panel_name; 
    int if_type;            
    int cmd_intf;  
    int pixel_bpp; 
    struct display_timing *timing; 
};
 
extern struct dc_dev g_dc_dev;
extern struct dc_operations dc_ops;
 
status_t sdrv_paral_to_csi_en(bool enable);
 
status_t sdrv_disp_mux_init(struct sdrv_panel *panel);
 
status_t sdrv_crc_mode_set(bool is_internal);
 
status_t sdrv_lvds_init(struct sdrv_panel *panel);
 
status_t sdrv_display_set_pixelclk(int clk);
 
status_t sdrv_panel_probe(struct sdrv_panel *panel);
 
status_t sdrv_display_init(struct dc_dev *dev);
 
void sdrv_lvds_channel_enable(bool enable);
 
void sdrv_display_rgb565_logo(struct dc_dev *dev, unsigned int width,
                              unsigned int height, unsigned char const *addr);
 
void sdrv_display_blank(struct dc_dev *dev);
 
int sdrv_display_get_width(struct dc_dev *dev);
 
int sdrv_display_get_height(struct dc_dev *dev);
 
void sdrv_display_set_bg_color(struct dc_dev *dev, int color);
 
status_t sdrv_display_surface(struct dc_dev *dev, struct surface *layer);
 
status_t sdrv_display_surface_noblock(struct dc_dev *dev,
                                      struct surface *layer);
 
status_t sdrv_display_post(struct dc_dev *dev, struct post_cfg *post);
 
status_t sdrv_display_post_noblock(struct dc_dev *dev, struct post_cfg *post);
 
void sdrv_dc_probe(struct dc_dev *dev, const struct dc_config *dc_cfg);
 
void sdrv_dc_handshake_enable(struct dc_dev *dev, int mode,
                              struct surface *layer);
 
void sdrv_dc_handshake_disable(struct dc_dev *dev, int mode, uint8_t zorder);
 
void sdrv_update_csi_detect(struct dc_dev *dev, struct surface *layer,
                            int mask_count, int ratio, bool enable,
                            bool pll_mode);
 
void sdrv_tcon_auto_adj_enable(struct dc_dev *dev, bool enable);
#endif /* DISP_CTRL_H__ */